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超大规模集成电路是电子设计自动化行业中的先驱，卡米德和林恩康威提倡的“以希腊字母为基础”设计风格为工具提供了一个精确的工具包.超大规模的集成电路已经成为早期细胞技术的标准。超大规模集成电路技术的快速发展诱发集成电路设计新模式的产生,系统级芯片(SOC)的构建基于预先设计，并添加核心中央处理器,数字信号处理器,和随机存储信息系统。这些核心测试需要大量的测试数据，这些测试数据随着系统级芯片复杂性的不断增加而快速变化。测试压缩和压缩技术被广泛用于减少存储数据和测试时间，并相应地减少测试数据的大小。

超大规模集成设计或制造经常使用非常小且复杂的电路修改后的半导体材料。

The VLSI was an important pioneer in the electronic design automation industry. The “lambda-based” design style which was advocated by carver mead and Lynn Conway offered a refined packages of tools.VLSI became the early hawker of standard cell (cell-based technology). Rapid advancement in VLSI technology has lead to a new paradigm in designing integrated circuits where a system-on-a-chip (SOC) is constructed based on predesigned and pre-verified cores such as CPUs, digital signals processors, and RAMs. Testing these cores requires a large amount of test data which is continuously increasing with the rapid increase in the complexity of SOC. Test compression and compaction techniques are widely used to reduce the storage data and test time by reducing the size of the test data.

The Very large scale integration design or manufacturing of extremely small uses complex circuitry of modified semiconductor material.

In 1959- jack St. Claire Kilby (Texas instruments) - they developed the first integrated circuit of 10 components on 9 mm2. In 1959, Robert Norton Noyce (founder, Fairchild semiconductor) has improved this integrated circuit which has been developed by Jack St & Claire Kilby, in 1968- Noyce, Gordon E. Moore found Intel, in 1971- Ted Hoff (Intel) - has developed the first microprocessor (4004) consists of 2300 transistors on 9 mm2, since then the continuous improvement in technology has allowed for increased performance as predicted by Moore's law.

The rate of development of VLSI technology has historically progressed hand-in-hand with technology innovations. Many conventional VLSI systems as a result have engendered highly specialized technologies for their support. Most of the achievements in dense systems integration have derived from scaling in silicon VLSI process. As manufacturing has improved, it has become more cost-effective in many applications to replace a chip set with a monolithic IC: package costs are decreased, interconnect path shrink, and power loss in I/O drivers is reduced.

As an example consider integrated circuit technology: the semi conductor industry Association predicts that, over the next 15 years, circuit technology will advance from the current four metallization layers up to seven layers. As a result, the phase of circuit testing in the design process is moving to the head as a major problem in VLSI design. In fact, Kenneth M, Thompson, vice president and general manager of the Technology, Manufacturing, and Engineering Group for Intel Corporation, states that a major falsehood of testing is that “we have made a lot progress in testing” in reality it is very difficult for testing to keep speed with semi conductor manufacturing technology.

Today's circuits are expected to perform a very bro本论文由英语论文网提供整理，提供论文代写，英语论文代写，代写论文，代写英语论文，代写留学生论文，代写英文论文，留学生论文代写相关核心关键词搜索。