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Computer Science Essay-可重构的性能估计

论文作者:www.51lunwen.org论文属性:短文 essay登出时间:2015-11-16编辑:chenyuting点击率:3169

论文字数:2440论文编号:org201511091829364272语种:英语论文 English地区:英国价格:免费论文

关键词:Reconfigurable压缩RLE

摘要:本文论述了一种高效的压缩位流放置技术,支持不影响压缩效率的压缩。这种技术使用位掩码提高效率,没有任何减压的惩罚。这有助于减少代码的大小。

Computer Science Essay-可重构的性能估计

Performance Estimation Of Reconfigurable

一个最近的研究领域包括重新配置FPGA,最小的比特流的大小和最佳记忆。重新配置也有助于改善通信带宽和减少重新配置时间。这是通过使用比特流压缩技术。一些比特流压缩技术用于多比特流压缩,但缺乏实时的解压缩,并有一些侧重于提高压缩性能的压缩部分。因此,设计一个高效的代码压缩技术是一个重要的任务,而不影响系统性能的代码压缩技术,从而导致减少代码大小。本文论述了一种高效的压缩位流放置技术,支持不影响压缩效率的压缩。这种技术使用位掩码提高效率,没有任何减压的惩罚。这有助于减少代码的大小,因此,在该地区,这是电源和性能改进的结果。所提出的技术克服了其他现有的压缩技术15%的性能,可变长度编码的解压缩硬件的工作速度是接近最佳的已知字段可编程门阵列为基础的解码器,用于固定长度编码。

关键字-压缩字典,压缩位掩码,压缩RLE

One of the recent research areas includes reconfiguration of FPGA, which involves minimum bit stream size and optimum memory. Reconfiguration also helps in improvement of communication bandwidth and reduced reconfiguration time. This is done by using bit stream compression techniques. Some bit stream compression techniques are used in multiple bit stream compression but are devoid of real-time decompression and some focuses on improving the decompression performance leaving the compression part. So it's a major task to design an efficient code compression technique which results in reduction of code size without affecting the system performance. This paper deals with an efficient compression bit stream placement technique which supports decompression without affecting the compression efficiency. This technique uses bitmasks which improves the efficiency without any decompression penalty. This helps in the reduction of code size and therefore results in the area, power and the performance improvement. The proposed technique overcomes the performance of other existing compression techniques by 15%.Also the operating speed of the decompression hardware for variable length encoding is closer to the best known field-programmable gate array-based decoder for fixed-length coding.

Keywords -Dictionary based compression,Bitmask based compression, RLE based compression.

简介-1. INTRODUCTION

FIELD-PROGRAMMABLE GATE ARRAYS (FPGAs) are widely used in reconfigurable systems. Since the configuration information for FPGA has to be stored in internal or external memory as bitstreams, the limited memory size, and access bandwidth become the key factors in determining the different functionalities that system can be configured and how quickly the configuration can be performed. While it is quite costly to employ memory with more capacity and access bandwidth, bitstream compression technique alleviates the memory constraint by reducing the size of the bitstreams. With compressed bitstreams, more configuration information can be stored using the same memory. The access delay is also reduced, because less bits need to be transferred through the memory interface. To measure the efficiency of bitstream compression, compression ratio (CR) is widely used as a metric. It is defined as the ratio between the compressed bitstream size (CS) and the original bitstream size (OS) i.e., CR=CS/OS . Therefore, a smaller compression ratio implies a better compression technique. There are two major challenges in bitstream compression: 1) how to compress the bitstream as much as possible and 2) how to efficiently decompress the bitstream without affecting the reconfiguration time.

Our approach combines the advantages of previous compression techniques with good compression ratio and those with fast decompression. This paper makes four important contributions. First, it performs sm论文英语论文网提供整理,提供论文代写英语论文代写代写论文代写英语论文代写留学生论文代写英文论文留学生论文代写相关核心关键词搜索。

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