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by MEMP_NUM_TCP_PCB
c) the heap size, defined by MEM_SIZE
d) the number of buffers, defined by PBUF_POOL_SIZE, and the buffer size, defined by PBUF_POOL_BUFSIZE
The number of buffers and the heap size allocated to the application depend on the application’s performance, simultaneous connection requirements and available RAM. Increasing these parameters (number of buffers and heap size) boosts the application performance and connectivity, but reduces the amount of available RAM. Conversely, decreasing these parameters increases the available RAM space, but limits the application performance and connectivity[5].
4) STM32F107 hardware checksum
Porting LwIP to the STM32F107 takes advantage of the advanced features of the STM32F107's Ethernet controller’s capability of generating, inserting and verifying the checksums of the IP, and TCP protocols by hardware. This feature frees some CPU load and improves the performance of the IAP program[6].
We can enable the checksum by hardware by uncommenting #define CHECKSUM_BY_HARDWARE in the lwipopts.h file.
The STM32F107’s checksum by hardware feature can be enabled by setting:
a) the CIC bits, in the first word of the Tx descriptor, for transmitted frames.
b) the IPCO bit, in the ETH_MACCR register, for received frames.
For those MCU without hardware checksum capability, software generation and checksum verification for the IP, UDP and TCP protocols can be enabled by commenting #define CHECKSUM_BY_HARDWARE in the lwipopts.h file. But it will add some CPU load and decrease the performance of the IAP program.
B. IAP program implementation
This IAP implementation allows the user to select a binary file with a web browser and to upload it to the embedded system. The IAP firmware can receive a binary file with HTTP protocol and program it into STM32 Flash memory automatically.
1) Firmware code layout in flash
Because the interrupt vector table of STM32F107 is at the lowest address of the program memory space[6], in order to make the IAP code response to interrupt correctly, the IAP code is placed at the base address of the flash memory. With the size not exceeding the total size of user flash area, the compiled user application code is placed right after the IAP code (figure 4).

Figure 4. Code layout in Flash memory
The first part of code must be downloaded to MCU with other ways, like JTAG or ISP. The second part of code can use the IAP function of the first part of code. Or it can be downloaded to MCU together with the first part of code, and be updated later with the IAP function of the first part of code.
Before the second part of code starts to run, it should remap the interrupt vector table of CPU to its own interrupt vector table. Then it can do other following operations.
The user application software is compiled and linked to run from the base address of the user Flash area. So, the jump address of IAP code must be equal to the user application link starting address, or the application program cannot be started up correctly[8]. In this IAP implementation, both of the IAP jump address and the base address of the user application program interrupt vector table are 0x8002000, because the user application program start address in the flash is equal to 0x8002000.
2) File upload using HTTP
File up